JPS632425A - Ｐｌｌ回路 - Google Patents

Ｐｌｌ回路

Info

Publication number
JPS632425A
JPS632425A JP61145530A JP14553086A JPS632425A JP S632425 A JPS632425 A JP S632425A JP 61145530 A JP61145530 A JP 61145530A JP 14553086 A JP14553086 A JP 14553086A JP S632425 A JPS632425 A JP S632425A
Authority
JP
Japan
Prior art keywords
circuit
pll
stereo
output signal
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP61145530A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0350451B2 (en]
Inventor
Kazuhisa Ishiguro
和久 石黒
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP61145530A priority Critical patent/JPS632425A/ja
Publication of JPS632425A publication Critical patent/JPS632425A/ja
Publication of JPH0350451B2 publication Critical patent/JPH0350451B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Stereo-Broadcasting Methods (AREA)
JP61145530A 1986-06-20 1986-06-20 Ｐｌｌ回路 Granted JPS632425A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61145530A JPS632425A (ja) 1986-06-20 1986-06-20 Ｐｌｌ回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61145530A JPS632425A (ja) 1986-06-20 1986-06-20 Ｐｌｌ回路

Publications (2)

Publication Number Publication Date
JPS632425A true JPS632425A (ja) 1988-01-07
JPH0350451B2 JPH0350451B2 (en]) 1991-08-01

Family

ID=15387343

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61145530A Granted JPS632425A (ja) 1986-06-20 1986-06-20 Ｐｌｌ回路

Country Status (1)

Country Link
JP (1) JPS632425A (en])

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01215122A (ja) * 1988-02-24 1989-08-29 Hitachi Ltd 位相同期信号発生回路
US5712532A (en) * 1994-04-04 1998-01-27 Hitachi, Ltd. Scalable CRT display device and phase synchronous circuit for use in display device
US5870073A (en) * 1994-09-02 1999-02-09 Hitachi, Ltd. Display with scan converter for converting scanning frequency of input video signal

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5657337A (en) * 1979-10-16 1981-05-19 Matsushita Electric Ind Co Ltd Phase control circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5657337A (en) * 1979-10-16 1981-05-19 Matsushita Electric Ind Co Ltd Phase control circuit

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01215122A (ja) * 1988-02-24 1989-08-29 Hitachi Ltd 位相同期信号発生回路
US5712532A (en) * 1994-04-04 1998-01-27 Hitachi, Ltd. Scalable CRT display device and phase synchronous circuit for use in display device
US5870073A (en) * 1994-09-02 1999-02-09 Hitachi, Ltd. Display with scan converter for converting scanning frequency of input video signal

Also Published As

Publication number Publication date
JPH0350451B2 (en]) 1991-08-01

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Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees